Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Zaměstnat Verilog / VHDL Designers

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    14 zakázek nalezeno, ceny v EUR

    I need help with implementing logic gates using primitive Nand Gates I will give u more details [pro zobrazení URL se přihlaste]

    €48 (Avg Bid)
    €48 Průměr. nabídka
    10 nabídky

    I need a VHDL core for Lattice ECP5 FPGA (or other) that will send strings (just generic strings) over Ethernet with VSC8531-02 using RGMII. The interface would be RGMII on one side and RX/TX FIFOs on the other side.

    €1430 (Avg Bid)
    €1430 Průměr. nabídka
    10 nabídky

    Need verilog code for radix-4 256 point fft

    €43 (Avg Bid)
    €43 Průměr. nabídka
    5 nabídky

    i need someone who has made bitstreams before for different algorithim's also the miner .exe file to go with it.

    €100 (Avg Bid)
    €100 Průměr. nabídka
    2 nabídky

    I want to be able to run a Simulink program and have it detect music. The main purpose is to take that information and either use it or eliminate it. If it is not recognized as music, the program continues. If it is recognized as music, I want it to stop for a period of time. During this time, checking new sample blocks for music and if recognized as music, stop for a period of time.

    €122 (Avg Bid)
    €122 Průměr. nabídka
    15 nabídky

    Looking to use the services of a developer with Serial Peripheral Interface protocol to have a Particle board talk with an eInk display. Update: Selected hardware: MCU: Particle Argon WiFi with latest firmware. e-Ink display: Dalian Good Display GDEW1248T3 We are looking to have functionality developed to display a full screen image with a changing string (alpha-numeric) in the middle of the scr...

    €1015 (Avg Bid)
    €1015 Průměr. nabídka
    33 nabídky

    Basic Requirements Build Linux OS for Xilinx Zynq 7030 FPGA SoC Develop AXI based ADC interface Build Linux driver for ADC interface Develop demo software Capture 2 high speed ADC channels up to 160MHz and 16 medium speed ADC channels up to 5MHz simultaneously Show reconstructed waveform on monitor with/without FFT results Advanced requirements Implement DMA for ADC interface Implement FFT for ADC...

    €367 (Avg Bid)
    €367 Průměr. nabídka
    7 nabídky

    This Project is to code exercises on latches, flip-flops and registers along with switches, lights and multiplexers VHDL -- Quartus Prime Lite 18.1 Quartus. Altera De-Soc board hardware implementation

    €59 (Avg Bid)
    €59 Průměr. nabídka
    4 nabídky

    I wanted to have one or two fpga bitstreams created for mining it depends on the board i have and how it's build i could give the model fpga i am going to use if that helps you better decide what to do to make the bitstreams compatible with the particular board or boards i will have.

    €35 / hr (Avg Bid)
    €35 / hr Průměr. nabídka
    15 nabídky
    AWR Design Environment software 1 den left
    OVĚŘENÉ

    looking for someone having expertise in AWR Design Environment software. Determining the error vector magnitude in a communication transmitter as a function of the parameters of the power amplifier by establishing a simulator test bench to calculate the EVM for some basic modulation schemes and for simple amplifier models.

    €84 (Avg Bid)
    €84 Průměr. nabídka
    2 nabídky

    I need someone to do VHDL Lab for me. We have the code and we need to add some more functionality to it where it required in the exercise. Code is in folder ex1srcpy and ex1srcvhdl. You have explanation of what you need to do in the picture.

    €138 (Avg Bid)
    €138 Průměr. nabídka
    13 nabídky

    i wanna implement 128x128 and 1024 x1024 vector matrix Multiplication synthesizable code including xdc file for Artix edge 7 FPGA board it will support VIvado 2018.1 above

    €33 (Avg Bid)
    €33 Průměr. nabídka
    8 nabídky
    Verilog/VHDL task 12 hodiny left
    OVĚŘENÉ

    Hello freelancers. I have some works related to Verilog/VHDL and i am looking for someone who can work with me for a long term. I need someone who can handle simple as well as complex tasks. I will share details of work with selected freelancer.

    €29 (Avg Bid)
    €29 Průměr. nabídka
    23 nabídky
    Looking for FPGA expert 10 hodiny left
    OVĚŘENÉ

    I am looking for someone having expertise in FPGA, i am looking for someone for long term work relation. People having good experience in FPGA but new to this platform are most welcomed. i will explain the details of task in chat

    €33 (Avg Bid)
    €33 Průměr. nabídka
    16 nabídky