Verilog / VHDL Jobs

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Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Zaměstnat Verilog / VHDL Designers

6 zakázek nalezeno, ceny v EUR

I want expert in simulink,matlab and algorithm 6 dní left

I want expert in simulink,matlab and algorithm

€19 (Avg Bid)

€19 Průměr. nabídka

4 nabídky

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Zynq7020 Dual OS (Linux + RTOS), buffering data from Ethernet to PL output. 5 dní left

PC send a files that up to ~50GB through Ethernet Port -> Process and buffer into Zynq Linux PS RAM -> Process and buffer into RTOS PS RAM -> Process and send into PL Parallel Output when received a tick from PL Input. The input clock tick up to 10kHz or several hundreds kHz randomly, so more data should be always buffered into RAM to avoid enet speed slow. Requirements: -Need webser...

C++ programování FPGA FPGA Coding Linux Verilog / VHDL

€666 (Avg Bid)

€666 Průměr. nabídka

10 nabídky

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Quartus software: Half Adder, Full Adder, 4-bit Incrementer and Adder 5 dní left

Subject: EEE 120 Digital Design Fundamentals Software: Intel's Quartus Prime Lite If you downlad the software, make sure that you include the following three components: Quartus Prime (includes Nios II EDS) ModelSim-Intel FPGA Edition (includes Starter Edition) MAX 10 FPGA device support Need this in 48hours I also have the old solution of the same lab report I am attaching it but i need t...

Elektrotechnika Elektronika Inženýrství Microcontroller Verilog / VHDL

€18 (Avg Bid)

€18 Průměr. nabídka

8 nabídky

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Kintex-7 Ultarscale with Simulink 4 dní left

I have many problems with the board connection. i want to work with Simulink plataform in order to transmit RF with AD9361

Elektrotechnika Elektronika Inženýrství Matlab a Mathematica Verilog / VHDL

€114 (Avg Bid)

€114 Průměr. nabídka

6 nabídky

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I need a logo designer 4 dní left

Logo for my business that describes us

Grafický design Ilustrátor Photoshop Verilog / VHDL

€17 (Avg Bid)

€17 Průměr. nabídka

44 nabídky

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Development environment for Opal Kelly FPGA with Front panel SDK 3 dní left

I want to learn and work on Opal kelly FPGA XEM6010-LX45. For this, I need a development environment to program on FPGA using Front panel SDK. I have this FPGA Board Deliverables: Need a detailed document for the below requirement 1. How to program on to the Opal Kelly XEM6010-LX45 FPGA from Front panel SDK 2. Linking Microsoft visual studio with wxwidgets for C# coding 3. Development steps for th...

Programování v C C# Programování C++ programování FPGA Verilog / VHDL

€19 - €159

0 nabídky

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