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TCP/IP HDL IP on Altera FPGA - open to bidding

$30-250 USD

Zavřený
Zveřejněno skoro před 7 roky

$30-250 USD

Zaplaceno při doručení
Do you have work on TCP/IP protocol implemented on Altera FPGA and worked with internet ? it is better wrote on verilog-HDL , thanks so much
IČ projektu: 14015425

O projektu

10 nabídky
Vzdálený projekt
Aktivní před 7 roky

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10 freelanceři nabízejí v průměru $158 USD za tuto práci
Avatar uživatele
Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
$250 USD v 3 dnech
4,9 (85 recenze)
6,4
6,4
Avatar uživatele
Hello! Please check my profile/reviews to know a bit about me. It would be great if I could help you out. I am currently working as a Verification Engineer with a leading semi-conductor company and my daily job involves working with SV/Verilog. Also, I do have Altera Modelsim installed and running on my PC. So, no installation/setup time would be required. Please do contact to discuss further. Thank you
$250 USD v 7 dnech
5,0 (73 recenze)
6,0
6,0
Avatar uživatele
we have exp on fpga/vhdl/verilog. let talk more detail.
$111 USD v 7 dnech
5,0 (14 recenze)
4,9
4,9
Avatar uživatele
Hey I work as a full stack developer and looking to start my my own work.I have worked on many ip applications like tcp server udp parsing data analyzing. always@(posedge clk) begin if(awarded)$display("move to next step"); else $display("Retry"); end
$111 USD v 3 dnech
0,0 (0 recenze)
0,0
0,0
Avatar uživatele
Hello, We are a team of embedded hardware and software professionals with experience in verilog/VHDL coding, simulation and implementation. Would like to know more about the project. Looking forward to work on this project. Please feel free to contact us for any further discussions. Thanks and Regards Techoviz
$100 USD v 7 dnech
0,0 (0 recenze)
0,0
0,0
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I have verified source code on stratix serial fpga.
$150 USD v 5 dnech
0,0 (0 recenze)
0,0
0,0

O klientovi

Pochází z TAIWAN
Taiwan
0,0
0
Členem od kvě 11, 2017

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