technical content writer for the verilog, system verilog,uvm and ovm with project examples

Ukončen Zveřejněno před 5 lety K zaplacení v momentě doručení
Ukončen K zaplacení v momentě doručení

my company is going to build a website for the asic verification. we need a technical content writer who knows the Verilog, system Verilog,uvm and ovm industry subjects.

Article Writing Elektrotechnika Technické psaní Verilog / VHDL Very-large-scale integration (VLSI)

Identifikační číslo projektu: #17620898

O projektu

10 nabídek Projekt na dálku Aktivní před 5 lety

10 Freelnceři na tento projekt zveřejňují nabídky v průměru ₹7811

loi09dt1

Hi, I am a highly-skilled FPGA engineer with 6+ years experience and hundreds of FPGA/Verilog/VHDL projects using Xilinx/Altera FPGA Design Tools and Digital Logic Design using LogiSim/CEDAR. An FPGA/Verilog/VHDL Codem Další

₹7777 INR za 1 den
(149 Recenzí)
6.7
raulbehl

Hello! I am a graduate in Electronics and Instrumentation Engineering from BITS Pilani Goa Campus, and am currently working as a freelance CPU Design Engineer. I am enthusiastic about Computer Architecture, Process Další

₹7777 INR za 7 dní
(85 Recenzí)
6.3
demossoft

I have reviewed your bid request and I am very interested in your project. I was trained overseas and have an extensive customer service record so contact me so we can discuss further or begin. Relevant Skills and Exp Další

₹11111 INR za 9 dní
(38 Recenzí)
5.2
SqUa11

Hi, I have 5 years experience in the digital design field please contact me for more details, Regards, Mohamed

₹12500 INR za 3 dní
(66 Recenzí)
5.2
EslamElGeddawy

Hi, I hope you are doing well and enjoying digital design. I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. Throughout my 3+ years of experie Další

₹8000 INR za 3 dní
(7 Recenzí)
4.5
engineeringexp

Master in Engineering, Electrical and Electronic Engineer, who is dynamic, reliable, resourceful, committed and organized with enthusiastic approach to succeed with a pleasant attitude. Possessing excellent analytical Další

₹7777 INR za 3 dní
(12 Recenzí)
4.4
janetyeah

I am working in the ASIC industry. I have been working in Cadence for two years. The project is definitely in areas of my expertise. I am very familiar with Verilog, Systemverilog, ovm and uvm. This is my first bid Další

₹7777 INR za 7 dní
(0 Recenzí)
0.0
ShankarVHDL

I done many projects documents with DO 254 standard

₹5555 INR za 7 dní
(0 Recenzí)
0.0