SRAM FPGA controller in Verilog

Hi guys, I've done a simple design to test the SRAM of Digilent Cmod A7 FPGA board.

This is how it works: Using a terminal through UART, I send the input data and address to the SRAM. Then I send address where to read, and I get back the data previously written.

Everything works OK except the controller.

I need someone to review my design and fix it.

Dovednosti: Elektrotechnika, Elektronika, FPGA, Microcontroller, Verilog / VHDL

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O zaměstnavateli:
( 6 recenzí ) Porto, Spain

Identifikační číslo projektu: #17928067

6 freelanceů na tento projekt zveřejnilo nabídku v průměrné hodnotě $19

$30 USD za 1 den
(378 Recenzí)
$10 USD za 3 dní
(157 Recenzí)

Hi, I'm opeoluwa a solid independent specialist, I am so eager to function as a consultant, I am a diligent employee, inspired by meeting set focuses inside due dates, as it gives me a feeling of achievement. I foc Další

$10 USD za 2 dní
(7 Recenzí)

Hello. After reading over your project this looks like a perfect fit for my skill sets. I have 10+ years of FPGA/CPLD and Verilog/VHDL expericece. I had also designed 256-to-8 encoder using FPGA and VHDL/Verilog. Další

$35 USD za 1 den
(4 Recenzí)

Hello, I am interested in solving your problem.

$10 USD za 2 dní
(0 Recenzí)

Hello, I have overall 10 years of experience in FPGA Design and Verification. I am interested in this project. Please provide your design will have a look and fix it. Thanks Kartik

$20 USD za 3 dní
(0 Recenzí)