RS-FEC 198,194 verilog code

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VLSI design for Reed Solomon FEC for 198,194 including documentation and explanation.

Verilog files and simple testbench to prove the design.

ASIC

Elektrotechnika Elektronika Inženýrství FPGA Verilog / VHDL

Identifikační číslo projektu: #20012622

O projektu

8 nabídek Projekt na dálku Aktivní před 4 lety

Uděleno uživateli:

hzarsuela

Hi! I believe I understand what you need. I have done several Verilog/VHDL design projects which are either implemented in FPGA (Xilinx and Lattice) or ASIC for the past 10 years. In fact, I already implemented the Další

$100 USD za 9 dní
(1 recenze)
2.0

8 Freelnceři na tento projekt zveřejňují nabídky v průměru $110

hsh564cf84accd96

Hi my Professional Aim is: ( Services then Solutions then Satisfactions) I hope you are good. As an experience in this field from last 5 years i am sure i can do it perfectly with in a time a Další

$30 USD za 3 dní
(77 Recenzí)
6.1
thasleemkamila

I have well experienced in doing such kind of jobs........................................................................................................................................................................ Další

$50 USD za 3 dní
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6.1
VirtualBrainInc

Hello! I have briefly read the description on fec-verilog-code development project, and I can deliver as per the requirements however I need us to discuss for more clarity on the details, deadline and budget as Další

$100 USD za 3 dní
(6 Recenzí)
4.5
iZoneFreelancer

Hi, I have worked on Verilog, VHDL, System Verilog and have developed many complex IPs for FPGA and ASICs. I can develop this verilog code for you. Let me know whether you are looking for an encoder only. Also shar Další

$250 USD za 7 dní
(4 Recenzí)
2.9
phalakegirish7

Hello sir, i am girish Phalake, FPGA design engineer with better industry experience, i am very good at paper design and also good in english Thank you!

$166 USD za 3 dní
(0 Recenzí)
0.0
abdelharizchaou

I have well experienced in the following topics.. Electronic circuits,Digital electronics Signals and system,Digital signal processing Digital image processing,Verilog/VHD Další

$30 USD za 10 dní
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0.0