Do VHDL project on the ModelSim

I want to do a VHDL project on ModelSim, all what you need will be in the attached document, i will need a report for the whole project ( explaining every file in the project and what it does ). I want phase 1 ( Design ) ASAP and the rest of the project within a week ( Maximum 10 days ). Please read the document carefully and if you have any questions contact me. Specify your price and time required to do the job.

Dovednosti: Elektrotechnika, Elektronika, Inženýrství, FPGA, Verilog / VHDL

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O zaměstnavateli:
( 0 recenzí ) Cairo, Egypt

Identifikační číslo projektu: #16730453

9 freelanceů na tento projekt zveřejnilo nabídku v průměrné hodnotě $158

$500 USD za 10 dní
(152 Recenzí)

Hello , How are you? I just saw your project description carefully. I am very interested in your project. I have rich experience in vhld,fpga,digital circuit. I am a full time developer and can work for you for a l Další

$120 USD za 10 dní
(77 Recenzí)

A proposal has not yet been provided

$200 USD za 10 dní
(15 Recenzí)
$50 USD za 10 dní
(9 Recenzí)
$83 USD za 10 dní
(0 Recenzí)
$83 USD za 10 dní
(1 recenze)
$222 USD za 10 dní
(0 Recenzí)

Hey, I am Mrs. Arohi. Currently I m Working at Indian Space Research Organization, India. I Have Good Grip on VHDL, VLSI, . Kindly Ping Me If You are Interested to Discuss.

$83 USD za 10 dní
(0 Recenzí)

I am electrical engineer and do your verilog based project.I am also expert in MATLAB AND VERILOG VHDL.

$83 USD za 10 dní
(0 Recenzí)