verilog code for turing machine

I want to design a verilog code for turing machine under EDAplayground at link [login to view URL]

I have already made code in C ( c code file is attached herewith) and it is working but I need to make it in verilog in the said online verilog compiler [login to view URL]

description for the working of Turing machine is as given below:

We want to output “ABC”

The code would be

i0 65 // load the register 0 with 65 which is ASCII “A” (hex 41)

i1 3 // load the register 1 with value 3

[x // set a Startmarker for a loop

oO // output the content of register 0

+0 // increment register 0

]1 // decrement register 1. If the result is not zero go back to Startmarker

Let’s say we replace the symbolic code with hex-numbers:

i = A // example A5 65 => load Register #5 with ASCII "A"

o = F

+ = B // example B5 => increment Register #5 (which get s "B")

[ = C // example C0 sets a start marker (label) for a loop

- = E

] = D

The code sequence would look like A0 41 A1 03 C0 F0 B0 D1

two digits after AO that is 41 will come out as result 44

that means

for 41 result will be 44

for 51 result will be 54

I conclude that result will be 3 digits higher any input.

please make in [login to view URL]

and send me both text files for [login to view URL] and [login to view URL] and also share with me the complete program from compiler [login to view URL]

Dovednosti: Verilog / VHDL, Programování v C

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O zaměstnavateli:
( 0 recenzí ) Longowal, India

Identifikační číslo projektu: #25669949

Uděleno uživateli:


i have 2+ year experience in design and verification, i have done 25+ project in verilog/VHDL, i will done your project perfectly and on time, i will provide support after completion of project, thanks and regard Další

$30 CAD za 1 den
(9 recenzí)

5 freelanceů na tento projekt zveřejnilo nabídku v průměrné hodnotě $26


I developed many real-time projects using Verilog programming like traffic control systems, lift control systems, etc. I can develop the Turing machine based on your requirements within 2 days(max). Relevant Skills an Další

$30 CAD za 1 den
(0 Recenzí)

Hi, I am VLSI engineer with 10 years of experience.I have expertise on Verilog ,verilog a , verilog AMS etc .I would like to have a discussion with you on this project requirement. Regards Vishnu Relevant Skills and E Další

$25 CAD za 1 den
(0 Recenzí)

Hi! I can make your project so quickly. I have experience working with VERILOG, in FPGA development.

$20 CAD za 2 dní
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Hello, I have very strong knowledge of Verilog and can code easily. I have recently delivered a digital lock system and cache emulator to my clients . i can do your project quickly. looking forward to hear from you Th Další

$25 CAD za 1 den
(0 Recenzí)