Cyclic redundancy check

Dear sir I have more than 10 years experience in digital design using Verilog, please check my profile also please message me so that we can discuss Best regards Stay tuned, I'm still working on this proposal.

tested working code in vhdl. So easily can map to verilog if. This is integrated and verified in many communi channels. Along with this i can share you test bench and matlab equivalent code also... Relevant Skills and Experience I am 4+ years of experience in micro architecture design

I will come up with Best code for crc check